UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

 

  

CSD_PICstick development board

Microchip

We can implement prototypes for simple circuits based on microcontrollers using standard commercial boards such as EXPLORER8 or older PICDEM2. However, it is interesting and educational to design a custom training board for solving our introductory CSD lab exercises. This is the purpose of the CSD_PICstick proposed in this unit.

1. Specifications Planning Developing Testing Report

Let us conceive a simple training board containing these features:

- 40 pin and 28 pin sockets for mC such PIC18F46K22 and PIC18F26K22.

- Reset push-button (MCLR_L).

- Primary 8 MHz (OSC1, OSC2) and secondary 32.768 kHz (T1OSI, T1OSO) XTAL oscillators.

- Connector ICSP for chip programming and debugging using commercial MPLAB SNAP device, PICkit5 or ICD5.

- Unregulated DC input VIN from 8 V to 15V. Power LED indicator.

- Selectable PIC voltage: VCC = +5V or +3.3V.

- 8 LED to represent binary codes (or a 10-LED bar). 

- Active-low push-button at RB0/INT0.

- Switch at RA4.

- Analogue input at RA0/AN0.

- 20x2 header connector with all microcontroller pinning.

CSD_PICstick

Fig. 1. CSD_PICstick idea. Jumpers will be used to connect or disconnect some circuits. The 40-pin expansion connector allows the insertion of any daughter board.

 

Specifications 2. Planning Developing Testing Report

In this section we will imagine the hardware circuit and where all inputs and outputs are connected. We will leave the schematic ready to be captured as a KiCad project.

Schematic ideas on the design of the CSD_PICstick

Fig. 2. Ideas on the schematic. We will use 40-pin and also 28-pin mC sockets.

Power adapter

You can use the laboratory power supply like VB8012 or a cheap standard unregulated AC 220V to DC 9V @ 1A  adapter to power the CSD_PICstick with +5V or +3.3V depending on the target mC.

Powering the CSD_PICstick

Fig. 3. DC power supply òr AC-DC power adapter.

 

Specifications Planning 3. Developing Testing Report

Proteus simulation. A series of design phases to check the circuit: phase #1, phase #2, phase#3, phase #4

Before designing the PCB, we can check whether the basic idea of the board and its inputs, outputs and oscillators works correctly solving as usual a given example in Proteus divided in several consecutives phases. Full detail on how to plan and install a FSM in uC are presented in P10 (phase #1), P11 (phase #2), and P12 (phase #3),  thus here in this unit only a few pictures and the source files are documented. For instance:

(1) Design phase #1. Let us solve the same Counter_BCD_1digit as a FSM using plan X proposed in LAB10 targeting a PIC18F46K22.

Symbols and function table
Hardware details for the design phase #1

Fig. 4. Counter_BCD_1digit symbol , function table and hardware to drive the application and watch outputs.

We can imagine an initial state diagram for the counter as represented in Fig. 5, where all state transition will occur on CLK active edges detected by interrupts on the main program.

State diagram example

Fig. 5. Counter_BCD_1digit state diagram.

Project location:

C:\CSD\CSD_PICstick\Counter_BCD_1digit\

This Counter_BCD_1digit.pdsprj is the hardware circuit and Counter_BCD_1digit.c the software C source program. The XC8 compiler version is v3.0.  Include this config.h file in your project.

Proteus circuit running

Fig. 6. Counter_BCD_1digit captured and running in Proteus.

 

(A series of design phases to check the circuit: phase #1, phase #2, phase#3, phase #4)

(2) Design phase #2. Let us add an LCD to the circuit.

C:\CSD\CSD_PICstick\Counter_BCD_1digit_LCD\

 

Fig. 7. Counter_BCD_1digit_LCD using 6 pins to interface the LCD peripheral. We will assume the LCD as only a device to write, thus RW_L interface signal will be grounded.

Parallel 6-wire interface. We will use the RD(5..0) through the expansion connector to interface the LCD. We need to find C libraries as it was proposed in P11. The reference and LCD libraries for this design are found here.

Proteus schematic running the application

Fig. 8. Proteus schematic. 

Software organisation is like in counter_BCD_1digit_LCD.

The XC8 compiler version is v3.0, C standard is C99. And these LCD library files lcd.c, lcd.h has to be included in the project. The file config.h contains all the microcontroller configuration bits.

This Counter_BCD_1digit_LCD.pdsprj is the hardware circuit and Counter_BCD_1digit_LCD.c the software C source program.

Compiler options and source files

Fig. 9. Library files and compiler options. To disable some warnings you can add these additional XC8 Compiler options: -Xparser -Wno-implicit-int-conversion -Wno-implicit-int-float-conversion. MPLAB XC8 C Compiler User’s Guide for PIC MCU.

 

Alternative serial 2-wire I2C interface. Another alternative way to interface the LCD simplifying the connections to only two signal wires is to use the bus I2C adapter. This schematic can also be simulated in Proteus before prototyping because the chip PCF8574 model is available. To proceed with this idea, we need to find a C language high-level LCD library for the XC8. Ref1., ref2., ref3.

I2C interface
Adapter I2C LCD

Fig 4. Synchronous serial I2C interface.

 

(A series of design phases to check the circuit: phase #1, phase #2, phase#3, phase #4)

(3) Design phase #3. In order to check that the secondary 32.768 kHz oscillator operates correctly, we can replace the external CLK or push-button by the internal TMR1 running as timer to generate the var_CLK_flag when TMR1 overflows. Timing period TP can be selected using the free push-button as a switch Sel_freq. For instance: 1 s (1 Hz) or 83.33 ms ( 12 Hz).

Project folder:

C:\CSD\CSD_PICstick\Counter_BCD_1digit_LCD_TMR1\

Counter using TMR1

Fig. 10. Counter_BCD_1digit_LCD_TMR1 symbol using a secondary crystal oscillator connected as input to TMR1.

For this application we have to select the secondary oscillator, and adjust N1 and N2 parameters to obtain the desired TP.  For instance: TP = 1 Hz ==> N1 = 1, N2 = 32768. TP = 12 Hz ==> N1 = 1, N2 = 2731.

How to configure TMR1 for timing TP

Fig. 11. How to configure TMR1 peripheral to generate a) 1 Hz or b) 12 Hz from the external 32.768 kHz secondary oscillator.

Software organisation is like in Counter_BCD_1digit_LCD_TMR0 replacing TMR0 by TMR1.

These are the source files: Counter_BCD_1digit_LCD_TMR1.pdsprj, Counter_BCD_1digit_LCD_TMR1.c.

Phase #3 schematic in Proteus

Fig. 12. Counter_BCD_1digit_LCD_TMR1 captured in Proteus. It is running using TMR1 interrupts driven by the secondary oscillator. Use breakpoints, watch window and follow the Program Counter to check how the microcontroller executes instructions.

 

(A series of design phases to check the circuit: phase #1, phase #2, phase#3, phase #4)

(4) Design phase #4. In order to check that the analogue input signal from the potentiometer AN0 is captured correctly, we can enhance the application adding analogue to digital (A/D) conversions. We can use the previous phase timing periods TP = 1 s or TP = 8.33 ms as sampling periods. 

Symbol adding the analogue to digital conversion

Fig. 13. Analogue to digital conversion.

We need to synchronise analogue to digital conversion on TMR1 interrupts as the way to fix the sampling frequency at the same var_CLK_flag. In this simple application, most of the A/D parameters will be fixed in init_system(). The function analogue_read() will start conversions and wait for end of conversion in a few microseconds. 

Example of software-hardware diagram

Fig. 14. Software organisation.

These are the source files: Counter_BCD_1digit_LCD_TMR1_AD.pdsprj, Counter_BCD_1digit_LCD_TMR1_AD.c.

A/D converter running
microcntroller pinning

Fig. 15. Counter_BCD_1digit_LCD_TMR1_AD captured in Proteus and all the mC pins in use.

These final output files can be used to test whether the board is operating correctly once soldered: Counter_BCD_1digit_LCD_TMR1_AD_prj.X.production.cof, .elf, .hex

PCB design

We will capture the full circuit in a new KiCad project to draw the complete schematic and its PCB. Many additional components are required at this level: connectors, jumpers, footprints, power regulators, decoupling capacitors, etc.

Schematic in KiCad

Fig. 16. The PCB schematic contains many more resources, like headers, test points, etc.

The full KiCad project PCB_CSD_PICstick_v2.zip. Project location:

C:\CSD\CSD_PICstick\PCB\

CSD_PICstick_3D_picture

Fig. 17. The 3D view of the finished board.

NOTE: Our current CSD and DEE KiCad symbols, footprints and 3D components are available in these three libraries DEE_libraries.zip to be unzipped and saved using these KiCad installation instructions. Basically, in this introductory PCB design level, the idea behind tuning components is to enlarge their pads for easy soldering.

You can use this prototype as a base model for copying and adapting your new application. Daughter or shield boards with additional components can be plugged through the 40-pin connector.

Another interesting option for developing a professional kit is miniaturise the prototype board selecting surface mount technology (SMT) components to be able to place components on both sides of the PCB.

 

Specifications Planning Developing 4. Testing Report

The board soldered and ready for testing these example projects is connected through the ICSP interface bus, as shown in Fig. 18, to the MPLAB SNAP in-circuit debugger and programmer.

SNAP and target board

Fig. 18. Target board, MPLAB SNAP and PC connection.

Run any of the example phases in this unit to test whether the CSD_PICstick works correctly.

Prototype board running

Fig. 19. Prototype ready for running an application.

 

We add here two experiments on programming the board with phase #4 application.

A) The first experiment connects the LCD peripheral on the protoboard using only the six wires.

LCd connection using six wires

Fig. 20. Phase #4 application running with a prototype connected using the six interface wires.

B) The second experiment connects the LCD peripheral on the protoboard using the 40-pin flat cable as represented in Fig. 21.

flat wire

Fig. 21. Phase #4 running with a prototype connected the 40-pin flat cable.

Why the experiment B does not work? It starts printing correctly the default message on the LCD, but it seems that is not counting or acquiring analogue voltages. Apparently there is no difference between such two experiments. Which may be the reasons for the experiment B not operating? If you can identify the problem, what to do to solve this error at different levels (software, PCB, circuit design, electronic components)? What knowledge or content you need to add to your background to enable you to investigate and propose solutions for such unexpected and curious phenomena?

You may continue the experiments measuring counter signals in a timing diagram using the VB8012 logic analyser as you did in Proteus.

 

 
Specifications Planning Developing Testing 5. Report

Project report: sheets of paper, scanned and annotated figures, file listings, notes or any other resources. In CSD follow this rubric of indications for writing reports.