UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

P11

P12: Peripheral TMR0. Adapting dedicated processors

EED


Resources in lectures and labs: L12.1, Lab11, L12.2, L12.3 Project objectives

Highlighted project:  4-bit serial transmitter  with TMR0 or TMR2 (phase #3)

1. Specifications

This is Serial_transmitter design phase#3: enhance Serial_transmitter_LCD replacing the external baud generator by an internal timer peripheral such TMR0.

Symbol

Fig. 1. Project s_trans_LCD_TMR symbol (entity name is shortened for not reaching Windows naming length limit).

Timing diagram representing bit duration Tbit and the idea of starting to send data immediately after having detected the start transmission (ST) rising edge.

Waveforms

Fig. 2. Waveforms.

 


Other similar projects on using TMR0 or TMR2

- 4-bit serial transmitter s_trans_LCD_TMR2 using TMR2 (design phase #4)

- Fixed-time (18.5 s) Timer.

Lab11 Phase #1 Timer : Timer using external CLK (50 Hz, 20 ms time-base).

NOTE: Be aware that a timer circuit is a dedicated processor application for measuring real-time conceived in P8 with the specific architecture: datapath + FSM + CLK_Generator. Thus, here in Chapter 3 we adapt it to C language.

Lab11 Phase #2: Timer_LCD that uses a library of LCD functions to print ASCII messages.

Lab11 Phase #3: Timer_LCD_TMR0 using internal TMR0 1 μs time-base to replace external time-base.   

Phase #4: Timer_LCD_TMR2 using internal TMR2 1 μs time-base to replace TMR0 for better accuracy.

- Johnson_sequencer_mod12_LCD_TMR0 (design phase #3)

- Arduino-based temperature meter Temp_meter.

 

Other assignments (design problems D3.1, D3.2, ...)

 

2. Planning

A) Hardware

The circuit is represented in Fig. 3. It is the same as in P11 without the external CLK oscillator for generting the bit rate.

Hardware circuit

Fig. 3. Hardware circuit.

Let us study the hardware of the TMR0 peripheral interpreting the datasheet diagram and configuration registers.

architecture Timer0

Fig. 3. TMR0 hardware in 8-bit mode from the PIC18F4520 datasheet. Study the TMR0 registers and configuration bits.


B) Software

We intent to generate var_CLK_flag using internal TMR0. Therefore, the project has the same conception and only minor changes are necessary. When ST interrupt is detected, TMR0 will be switched on, configured and and set as the bit time Tb source for  tranmitting bits. In the last state END_message TMR0 will be switch off. 

hardware-software

Fig. 5. Software-hardware diagram when using TMR0.

One idea is to use TMR0 in 8-bit mode. Infer N1, N2 and N3 values required in this application for generating a timing period Tp = 6.66666667 ms equivalent to 150 b/s, or the nearest value.

TMR0 hardware

Fig. 6. TMR0 in 8-bit mode for generating a timing period of TP = 6.666 ms. 

The list of RAM variables required are shown in Fig. 7.

RAM variables

Fig. 6. RAM variables. Selected values allows generating 149.88 Hz (0.08% error). 

An alternative idea is to use the TMR0 in 16-bit mode, thus for timing 6.666 ms is not necessary to use neither the prescaler or the software postscaler, resulting in a simpler configuration because we can program var_TMR0_TC_N2 = 6666 obtaining even more precision.

TMR0_16bit_mode_of_operation

Fig. 7. TMR0 in 16-bit mode for generating a timing period of TPP = 6.666 ms. In this case, the bir rate is 150.015 b/s, (error 0.01%). However, instruction execution time imposes a time overhead that do not allow to reach such precision. TMR2 generates higher time precision due to an improved circuit with hardware parallel load.

This is how the state diagram in modified for configuring and driving the TMR0. When timing period TP = 6.666 ms is reached, var_CLK_flag is set. The main idea now is to configure and start TMR0 when the ST edge is detected at the ISR() function., thus start bit will be send immediately after the ST active edge. Start_bit state will remain until the TP is elapsed.

State diagram modifications

Fig. 8. State diagram modifications.

 

We will draw only the function sections where the TMR0 parameters are set.

 

Fig. 8. ISR() function flowchart.

 

Project location:

C:\CSD\P12\s_trans_LCD_TMR0\(files)

 

3. Development and 4. Testing

A) Developing hardware

Project is renamed to shorten the folder path names and location.

This is the s_trans_LCD_TMR0.pdsprj circuit captured in Proteus.

Captured circuit in Proteus

Fig. 10. Captured circuit.

 


B) Developing software

This is the s_trans_LCD_TMR0.c source code. Remember to unzip LCD libraries in the project folder, two header files and two C files for driving the LCD.

 


C) Step-by-step testing

Fig. 11 shows Proteus running this application while at the same time watching RAM variables of interest.

Proteus running the application

Fig. 11. Proteu running the application.

Oscilloscope results can be printed using white background colour for easy annotating and saving ink. 

Wave from Proteus

Fig. 12. Proteu oscilloscope waveforms when Din = "0101"

 

Measure the transmission frequency accuracy.

Modify the design to use the TMR0 in 16 bit mode.

 

5. Report

Follow this rubric for writing reports.

 

6. Prototyping