UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL


 Electronic design automation (CAD/EDA) tools


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SPICE-based simulation 


Proteus from Labcenter Electronics (commercial) is a virtual laboratory and SPICE-based simulation of electronic circuits. Analogue electronics, digital circuits and microcontrollers simulation, all in one.

Available at the EETAC. Download and install the current professional version in your home or portable computer and run our cloud licence while EETAC student. Contact us to get your you user/passwrd.

This is where we have Proteus tutorials and examples on the use of the simulator.


Multisim from National Instruments (commercial) is the schematic capture and simulation program designed for schematic entry, simulation, and feeding to downstage steps, such as PCB layout. 

Available at the UPC. Instructions on how to setup the software.


Numerical engines and other simulators


WolframAlpha. A powerful computing tool available from Wolfram Research.

Examples on how to use it.


HADES Java applets, a framework for interactive simulation from University of Hamburg. Here it is more information on how to use and install it.

DEEDS DEEDS Digital Electronics Education and Design Suite. Giuliano Donzellini, University of Genoa, Italy
LogicWorks  LogicWorks is a schematic drawing and interactive digital simulation package for demonstrating logic design principles and practices within the education sector and industry.


Minimisation of logic functions

Minilog.exe application and tutorials on how to use it.

(© W.M.J. de Valk). Minimisation program (source Wikipedia EXPRESSO).


Logic Friday. Logic Friday takes the help of Espresso logic design minimiser to efficiently reduce the functions in your electronic design. Instead of using the traditional Karnaugh map method of min term reduction, the program manipulates the function iteratively to give a closely approximated result, eliminating redundancy. (ref.)

Lattice Semiconductor EDA tools for CPLD and FPGA


Lattice Semiconductor Diamond.


Lattice Semiconductor ispLEVER Classic.


Xilinx EDA tools for CPLD and FPGA 


ISE. Download and use the version 14.7 (2013). (ref). ISim is the integrated VHDL simulator that will be used to check our designs.

The Adept application is for downloading the configuration bit file to the board. The latest version for windows is v2.19.2.



Vivado is the new EDA tool from Xilinx to cover newer FPGA


Intel EDA tools for CPLD and FPGA

Quartus Prime 

Intel Quartus Prime. Download and use the latest version. ModelSim Intel Starter Edition is the integrated VHDL simulator that will be used to check our designs.


  NOTE: from version 21.3, ModelSim Intel Starter is replaced by Questa-Intel FPGA Starter Edition. MentorGraphics was adquired by SIEMENS. We are planning this upgrade for the next semester 22/23-Q1.


Microcontroller programming environment 

Microchip integrated development environment and C compiler.



 MPLABX Integrated Development Environment (IDE)  XC8 C compiler.