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Bachelor's Degree in Telecommunications Systems and in Network Engineering |
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Legacy hardware for PLD/FPGA and mC |
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| Classic digital technologies | Analogue chips and devices | Companies and chip manufacturers | Legacy |
Let us give obsolete boards a second chance. For educational purposes at an introductory level, are not only classic CMOS-4000 series or LS-TTL chips still of interest for comprehending in detail how components in digital systems are conceived but also many training boards for sPLD/CPLD/FPGA and μC are kept operational in our labs for demonstration purposes and experimentation. Some of them are more than 25 years old.
To install and run all legacy software we use a Microsoft Windows 7 operating system running in an Oracle VM VirtualBox.
Let us organise and complete all the legacy projects following these three steps:
1. You can: (1) Specify, (2) Plan, (3) Develop and (4) Test (functional) your complete project using your current EDA tools, for instance Quartus Prime.
2. When ready, you can (5) Prototype the top design for the given target board and programmable chip using the legacy software embedded in the VM. At this design section you only have to synthesise again the same set of VHDL files using the older version of the EDA tool and pay attention to the pin assignment and target chip configuration files. You can use a shared folder between the computers:
C:\CSD\W7_VM\(files)
3. You can use the current Windows 11 version of the EDA specific programmer tool to download the configuration files (pof, sof, bit, jed, etc.) for the legacy programmable devices.
Intel/Altera |
AMD/Xilinx |
Lattice Semiconductor |
Infineon/Cypress |
Intel - Altera
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Chip:
Cyclone III:
3C16F484C6N |
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Chip: Cyclone II EP2C35F672C6 |
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NIOS-1 board. Documents, schematic, pinout list, Chip: APEX EP20K200EFC484-2X CSD demonstration application. The Byteblaster parallel port download cable is replaced by the MAX-II micro kit. |
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UP2 board. Documents, schematics, MAX expansion connector corrected. Chip: MAX7000 EPM7128SLC84-7 Chip: FLEX10K EPF10K70RC240-4 CSD example application. |
Intel/Altera |
AMD/Xilinx |
Lattice Semiconductor |
Infineon/Cypress |
AMD - Xilinx
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Nexys2 FPGA Board User manual and software ISE and ISim to implement and simulate the project (currently this software v. 14.7 is executed in a VM in Windows 10). The Digilent Adept application to program the device. FPGA from AMD: Spartan-3E XC3S500E-FG320 Schematics and documents (1). ISIm wave colour scheme with white blackground. |
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CoolRunner-II CPLD Starter Board User manual and software ISE and ISim to implement and simulate the project and the Digilent Adept to program de device. CPLD from AMD: XC2C256-TQ144 - 7 Documents (1) |
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Intel/Altera |
AMD/Xilinx |
Lattice Semiconductor |
Infineon/Cypress |
Lattice Semiconductor
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HWD-LC4128V Hardware Design JK. Die Experimentierplatine für die Digitaltechnik CPLD Lattice Semiconductor ispMach LC4128V-75TN100C Schematics and documents (1), (2), (3) (driver USB) |
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Chip: ispGAL22V10 GAL22V10 protoboard details (1), (2), example: 1-digit BCD counter |
Intel/Altera |
AMD/Xilinx |
Lattice Semiconductor |
Microchip |
Infineon/Cypress |
Microchip
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Prototyping boards, simulators, programmers and in-circuit debuggers:
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PICkit 3 In-Circuit programmer and debugger. (ref.) |
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In-circuit debugger and programmer tool ICD 3 tool: (ref.)
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Example to startLab10 {Counter_BCD_1digit} |
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User manual, schematics and sample projects from Microchip. Chip: PIC16F877A (the new replacement for the PIC16F873A, the PIC16F883 is available in Proteus) |
Example to start Lab10 {Counter_BCD_1digit} |
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PICDEM2 simulated in Proteus-VSM Board with PIC18F4520 Board with a PIC18F46K22 Demo default for the PIC16F877 (old board) |
Example for PIC18F46K22 |
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This is another example of board for discovering PIC microcontrollers. EasyPIC-40. (manual, schematic) |
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PIC16F 8-bit MCU Development Study Learning Board Kit. CSP (PICkit 2 or similar) is required to program the chip. |
Schematic and example code. |
Intel/Altera |
AMD/Xilinx |
Lattice Semiconductor |
Infineon/Cypress |
Infineon - Cypress
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| Web activa des de 09/2001, @ F. J. Robert, J. Jordana. Web editat amb Microsoft Expression Web 4. El contingut és un complement als materials d'estudi del curs Circuits i Sistemes Digitals disponibles al campus digital Atenea. Llicència:Reconeixement 4.0 Internacional de Creative Commons |