| Chapter 1 |
Chapter 2 |
Chapter 3 |
| Combinational
circuits |
Sequential systems
|
Microcontrollers |
|
|
P12: Peripherals:
timers, A/D, etc. |
| |
P11: Peripherals: LCD display. |
| |
P10: Implementing FSM in C language. Interrupts. |
|
P9: Microcontroller architecture.
Digital I/O. |
|
P8: Dedicated processors: datapath, control unit and CLK generators. |
| |
P7:
Standard sequential systems: counters, data and shift registers. |
|
P6: Finite State machines
(FSM): synchronous canonical sequential systems. |
|
P5:
1-bit memory cells. Analysis of circuits based on latches
and flip-flops. |
|
P4:
Standard rithmetic circuits (2C, integers) and ALU.
Propagation time and computing speed. |
|
P3:
Standard arithmetic circuits (radix-2): adders, comparators, etc.
Plan C2, hierarchical structural. |
|
P2: Standard logic circuits: mux, demux, dec, enc, etc. Flat VHDL: plan A, logic equations; plan B, behavioural. |
| P1: Logic gates and Boolean algebra. Analysis and design: schematics, truth table, minterms, maxterms, SoP, PoS. |
| Cross-curricular
skills
Atenea |
| |
|
|
|
|
|
|
|
|
|
|
|
This CSD course is intended for EETAC
students and anyone who wants to learn about systematic
digital circuit design.
- Search inside digsys:
