UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

PLA2_3

Q&A

PLA4: Circuit speed, technologies and prototypes

PLA6_7

P1 design, P2, P3, LAB 4.1, LAB 4.2
NOTE: This PLA4 has two parts related to laboratory sessions LAB 4.1 and  LAB 4.2. Each lab group will continue their PLA2_3 project and will perform measurements on the ALU_9bit prototype.

The main concepts, ideas and how to plan the design flow step #5 are presented in Fig. 1.

Planning_1
Planning_2

Fig. 1. Concepts and ideas to develop in this assignment.

 

Specifications on LAB4.1 (project section #5)

The new VHDL design flow step #5: characterising how fast is your circuit  the circuit for the given internal design architecture you solved in PLA2_3, and for a two target chip options.

Initial work to do:

I) Solve LAB 4.1 in your computer to learn how to perform gate-level simulations and how to use the timing analyser tool.

Example of exam question: If instead of CPLD/FPGA chips, if we were designing using classic chips, how many levels of gates will contain your circuit? (To answer this question imagine that all your circuits are based on plan A (NGL = 3) and plan C2).

 

II) If your PLA2_3 circuit is not yet fully operational or were not correctly synthesised or tested, take some time to correct and complete it. PLA2_3 sections 1 - 2 - 3 - 4 do not have to be reported again, explain only in an annex what was wrong and corrected. 

 

Simulations and calculations

Using the same VHDL files at the new project location, you will repeat the measurements for two target chip  options (technology) in order to compare results:

III) Measure the propagation delay tPt in a given transition using gate level simulations and vertical cursors on the wave diagram. Draw an schematic indicating the operands or inputs that are switching and the expected results.

IV) Using the timing analyser, determine the propagation delay tP, the longest propagation path from a given input port to a given output port. 

V) Calculate the theoretical maximum speed of operation of your circuit. Which technology is faster?

VI) Demonstrate that your circuit does not calculate or operate correctly its truth table when the testbench Min_Pulse parameter is shorter that the circuit's propagation delay tP. Thus, reframing the question: what is the minimum value for Min_Pulse in testbenches?

 

Specifications on LAB4.2 (project section #6)

The final step #6 on prototyping will be carried out using the same ALU_9bit in LAB4.2. If you have interest and time you are invited to prototype your PLA2_3 circuit in the DE10-Lite platform once the course ended.

We will write a report on experiments and lab measurements. Some interesting questions to answer are for example:

Experiment discussion

VII) Draw a sketch of the experiment and a flowchart of the sequence of measurements and ideas.

VIII) Solve a pre-lab question that you find interesting or relevant ===> For example the Exam1 --> P1 that is focused in this ALU_9bit and some of its internal components. Review the concepts on logic bitwise operations, arithmetic operations using 2C, sign bit. Apply more input vectors if necessary.

IX) Propagation delay measurement from B(0) to C. In this special case, exceptionally, we imagine that the operands are radix-2 numbers.

X) Power consumption at 1 kHz (static, low frequency). 

XI). Power consumption at 5 MHz (static + dynamic).

 

 

P_Ch1 marking grid for projects PLA1, PLA2_3 and PLA4

P_Ch1 (work in progress, reports and presentations) represents 15% of the final grade:

=> PLA1 (30%) + PLA2_3 (report + video, 50%) + PLA4 + (20%)

PLA2_3 handwritten report and video presentation:
Video Report  
  4p 6p    

Notes on lab assessment: student grades are not simply reflecting report or video quality, but implicitly, they include subjective items considered by instructors such laboratory participation, questions and answers, problem solving skills, attendance and punctuality, active attitude and group work. Work in progress includes completing tutorials, sample reports, sketches, diagrams, discussions, Q & A, presentations, live demonstrations, results, measurements, etc.

Reflect and give us your group feedback on what you learned in chapter 1 (from P1 to P4). Add a short paragraph in the final section of your PLA4.2 discussing aspects that you consider positive and negative.