UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL


Lecture 2

L6.2: FSM applications

[P6] Designing a 16-key matrix encoder



2.6.3. 16-key matrix keypad encoder (P6) {Matrix_encoder_16key}

Let's study and run the tutorial on the design of the 16-key matrix keyboard encoder specified in our highlighted P6. As you can imagine, our FSM procedure will be used. Power -ON reset circuit allows initialization once power is applied, in this way reset button or any user action is not requiered.

- Specifications and plan: Example of a commercial chip, matrix keypad simulated in Proteus, matrix circuit in rows and columns, project symbol and inferred state diagram. FSM organisation, CLK frequency for matrix keyboard scanning speed, state register, CC1 and CC2 truth tables and flowcharts. 

- Development and test. VHDL file following the FSM pattern, EDA tool project and synthesis, RTL circuit, technology circuit, testbench preparation, functional simulation, gate-level simulation.

This is a keypad scanner commercial chip from Dialog (Renesas) a company specialised in asynchronous state machines (ASM) architectures similar to the systems we are dealing with. In P12 we can implement again the the functionality of the keypad scanner programming a PIC microcontroller, PORTB generates special interrrupts for easy connecting keypads. 


Fig 1. Keypad scanner from Dialog (Renesas). Block diagram of the GreenPAK chip application that performs the I2C interface between a keypad and a microcontroller.

Prototype demonstration. This project is enhanced using materials from P8 on the design of the CLK_generator component so that scanning frequency can be derived from a quartz crystal oscillator populating the training board.


Other materials of interest (theory and commercial examples):

At this stage it is recommended to read books in digital electronics to see how content on sequential systems is explained and discuss and compare with our CSD methodologies. 

An application note on how to design safe FSM, the concept to prevent that a machine "hangs" being unable to get back to a valid state.

Many other examples of FSM applications are listed in P6