|
|
|||
|
|
Design the Circuit_PQ using plan B |
Circuit_PQ plan C2 |
|
| B1: schematic | B2: flowchart |
| 1. Specifications | Planning | Developing | Testing | Report | Prototype |
B1. Implement the circuit in Fig. 1 using a VHDL behavioural plan B based on capturing the truth table directly translating a schematic interface.
| Fig. 1. Circuit_PQ to design. P = f(S1, S0, A, B), Q = g(S1, S0, A, B) |
---------------------- Formatted tables -------------
D1.13 8-bit radix-2 subtractor with BCD inputs and 7-segment display outputs.
Start studying the top circuit and how it may work. Imagine its internal architecture counting the number of projects involved and the total numbers of VHDL files that will be required, whatever you are inventing them or copying and adapting directly from other CSD products.
Options for designing some of the components in the chips. Study individually each project specifications in detail. Large circuits are all of them plan C2, and its architecture is proposed or can be found or adapted from CSD products.
|
Project 3 Subt_1bit |
Project 4 Sign_corrector |
Project 7 DM74184 |
Project 5 DM74185 |
Project 8 Hex_7seg_decoder |
Project 9 Quad_MUX_2 |
Operands for timing diagrams and test benches | |
| Group 1 | A.1 | C2.1 | A | B | A | C2 | 1 |
| Group 2 | A.2 | C2.2 | B | A | B | B | 2 |
| Group 3 | B.1 | C2.1 | A | B | A | C2 | 3 |
| Group 4 | B.2 | C2.2 | B | A | B | B | 1 |
| Group 5 | A.2 | C2.1 | A | B | A | C2 | 2 |
| Group 6 | C2.1 | C2.2 | B | A | B | B | 3 |
| Group 7 | C2.2 | C2.1 | A | B | A | C2 | 1 |
---------------------------------------
| Specifications | 2. Planning | Developing | Testing | Report | Prototype |
The project location may be:
C:\CSD\P2\Circuit_PQ_B1\(files)
| Specifications | Planning | 3. Developing | Testing | Report | Prototype |
| Specifications | Planning | Developing | 4. Testing | Report | Prototype |
| Specifications | Planning | Developing | Testing | 5. Report | Prototype |
Follow this rubric for writing reports.
| Specifications | Planning | Developing | Testing | Report | 6. Prototype |
We can use the DE10-Lite board to implement this project, as shown in Lab 1.2 for the similar Circuit_W.
| B1: schematic | B2: flowchart |
| 1. Specifications | Planning | Developing | Testing | Report | Prototype |
B2. Implement the circuit in Fig. 1 using a behavioural plan B based on interpreting the truth table as a flowchart.
| Fig. 1. Circuit_PQ to desing. P = f(S1, S0, A, B), Q = g(S1, S0, A, B) |
| Specifications | 2. Planning | Developing | Testing | Report | Prototype |
The project location may be:
C:\CSD\P2\Circuit_PQ_B2\(files)
| Specifications | Planning | 3. Developing | Testing | Report | Prototype |
| Specifications | Planning | Developing | 4. Testing | Report | Prototype |
| Specifications | Planning | Developing | Testing | 5. Report | Prototype |
Follow this rubric for writing reports.
| Specifications | Planning | Developing | Testing | Report | 6. Prototype |
We can use the DE10-Lite board to implement this project, as shown in Lab 1.2 for the similar Circuit_W.