UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

L1.5

Lecture 6

L1.6. Electrical characteristics

[P1] Voltage levels, '1' and '0', noise margins, power dissipation, technology

L2.1

[28/2]

1.6. Standard logic gates chips and circuits

The world of digital electronic technologies is formidable and a huge industry. It is also a high-end research area. Here in this introductory CSD subject our aim is very simple, let us discover basic features of logic gates and programmable devices such as voltages and static power consumption. Dynamic characteristics will be introduced at L4.3.

1.6.1. Logic families

1.6.1.1. TTL, LS-TTL, HC, HCT, etc.

74LS32

Fig. 1. Example of electronic circuit for a 2-input OR logic gate 74LS32 (LS-TTL).

1.6.1.2. CMOS. How do NMOS/PMOS transistors work as ideal electronic switches?

 

CD4071B

Fig. 2. Example of electronic circuit for a 2-input OR logic gate MC14071B (CMOS).

Example of CMOS_Gates.pdsprj adapting circuit structures proposed in datasheets.

These are typical datasheets (LS-TTL, CMOS).

 Databook on logic circuits from Texas Instruments.

 

1.6.2. Standard chip references for classic logic families

Standard logic gates and chip references. Standard symbols: traditional and ANSI. Commom logic families (1), (2).

 

1.6.3. Electrical characteristics of logic gates

Some basic ideas (1) to start: voltage values, noise margins, power rails, etc.  

1.6.3.1. Voltage levels. What voltage range is interpreted as '0' and as '1'? VOHMIN, VOLMAX, VIHMIN, VILMAX

1.6.3.2. Noise margin high (NMH), noise margin low (NML), logic family compatibility

Voltages and logic levels rec. Which voltages are interpreted as a '0' and a '1' at the input or at the output of a logic gate?

Voltage margins

Fig. 3. Definition of the high and low noise margins (souce ref.)

Technology 74LS (for instance, chip 74LS04) or CMOS 4069.

If the added noise is high, digital voltages can be severaly altered and misinterpreted by logic gates, geneating false digital signals or unpredictable results.

Digital signals must be kept varying in the corresponding margins.

Gate signals

You can run this Circuit in Proteus to get an idea on voltage levels, currents, power consumption and logic values.

Remaining electrical characteristics not considered in Fig 3 such signal edges, switching times and propagation delays are explained in lecture L4.3.

1.6.4. Input push-buttons and switches to genetate '1' and '0'

1.6.4.1. Active-high button circuit

1.6.4.2. Active-low button circuit

How to connect push-buttons and switches to chip inputs to generate '1' and '0'? rec.

This is Circuit_W  to play with buttons in Proteus.