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 Bachelor's Degree in Telecommunications Systems and in Network Engineering
 Lecture 4 L2.4: Electrical characteristics: driving LED from digital outputs  [P2] Seven-segment decoders (HEX_7seg_decoder), plan A, plan B [26/2]

1.6.5. Driving LED

You can run this circuit in Proteus to get an idea on voltage levels, currents, power consumption and logic values.

1.6.5.1. LED biasing characteristics.

1.6.5.2. Active-low and active-high outputs

1.6.5.3. Limiting resistor for worst-case scenario

Driving LED: How to drive LED from logic gates? rec. This Circuit_logic_levels.pdsprj is a circuit to play with LED and to observe how when a logic gate is sinking too much current voltage levels are degraded.

Two circuits are possible: active-high (commom cathode LED) and active-low (common anode LED).

For instance, selecting a Rohm semiconductor SMT LED SML-P11VTT86(R) and using CMOS or TTL-LS buffers or inverters:

This is another typical LED datasheet.

Let us discuss about how to drive LED. This is another version of Circuit_W in Proteus where you can add to Chip1 some buttons, switches, LED's and even relays and motors. Play with the circuit and pay attention to the real voltages and currents that represent '0' and '1' signals.

1.6.6. Driving 7-segment displays

- How to drive a 7-segment common-anode or common-cathode display?

1.6.6.1. Common anode digits

1.6.6.2. Common cathode digits

1.6.6.3. Multiplexed operation

1.7.6. Hexadecimal to 7-segment decoder (HEX_7seg_decoder)

1.7.6.1. Basic decoder as standard component

It is a circuit to drive the typical 7-segment displays. Run the circuit Dec_hex_7seg.pdsprj in Proteus to figure out how it works and infer its truth table.

1.7.6.2. Control signals: blanking (BI), ripple blanking (RBI, RBO), lamp test (LT)

1.7.6.3. Commercial chips

Type 74LS47 (active-low outputs for common anode display), HEF4511B (active-high outputs for common cathode display), etc.

1.7.6.4. Design examples

And, again, two alternative and systematic design plans are presented:

- Plan A. . Using a structural approach based on minimised equations (SoP / PoS).

- Plan B. . Using a behavioural (high-level) description (truth table or algorithm) approach.

Exercise: Calculate the limiting resistor of a common anode LED circuit both both technologies CMOS and LS-TTL operating with VCC = 5 V. The bias point is IDQ = 16 mA, VAKQ = 2.1 V. Simulate the circuits in Proteus to verify the LED bias point when lighting.