UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

Digital Circuits and Systems (CSD)                                     20-21 Q2


Chapter 1 Chapter 2 Chapter 3
Combinational Circuits Sequential Systems Microcontrollers
Intended learning outcomes and organisation P12: Peripherals: Timers, A/D, etc.
  P11: Peripherals: LCD display.
P10: FSM style of programming. Interrupts.
P9: Microcontroller architecture. Digital I/O.
P8: CLK generators and dedicated processors.
P7: Counters, data and shift registers.
P6: Finite State machines (FSM).
P5: 1-bit memory cells: latches and flip flops.
P4: Arithmetic circuits (2C, integers) and ALU. Propagation time and computing speed.
P3: Arithmetic circuits (radix-2): adders, comparators, etc. Hierarchical structural VHDL: plan C2.
P2: Standard logic circuits: mux, demux, dec, enc, etc. Flat VHDL: plan A, structural; plan B, behavioural.
P1: Logic gates and Boolean algebra. Analysis and design: schematics, truth table, minterms, maxterms, SoP, PoS.
Cross-curricular competences (1) (2) (3) (4) (5)
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