UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

Content

P1: circuits based on logic gates

P2


 Resources in lectures and labs: L1.1, L1.2, Lab1.1, Lab1.2, list of methods for designing combinational circuits.


Example project: Circuit_C

1.Specifications (What do I have to do?)

Objetive A (analysis). Deduce the truth table of circuit in Fig. 1 using the methods stated in this concept map (Visio).

Circuit_C

Fig. 1. Example Circuit_C to analyse.  C = f(D1, D0, A, B)


Objective B (design). Using Circuit_C truth table as specification, invent circuits using gates:

Circuit_1 - Using canonical equations (maxterms).

Circuit_2 - Using canonical equations (minterms).

Circuit_3 - Using minimised equation sum of products (SoP) from minilog.exe (Karnaugh map application).

Circuit_4 - Using minimised equation product of sums (PoS) from minilog.exe.

Circuit_5 - Transform the Circuit_3 and build another version using only NAND gates.

Circuit_6 - Transform the Circuit_4 and build another version using only NOR gates.

Circuit_10 - Transform the Circuit_6 and build another version using only 2-input NOR.


Other similar analysis projects: Circuit_K, Circuits A and B.

 

2. Planning (How to solve it?)

Planning means organising and discussing how to proceed to reach solutions. A flow chart of sequential operations will be convenient to explain what to do, how to do it and when.

Section A: Analysis (Visio): Deduce the circuit's truth table using four approaches and compare solutions. Remember that the truth table must be verified (with other students, with different tools, etc.) before to proceed with objective B.

Plan section A

Fig. 2. Analysis methods.

Place each exercise in a different folder and name them accordingly. Normaly we use as a hard disk drive our network SMB <drive> =  L:\ (available through the repositori de fitxers at the virtual desktop computer). For instance:

<drive>:\CSD\P1\Proteus\Circuit_C.pdsprj (the circuit captured in Proteus to  be simulated)

<drive>:\CSD\P1\Wolfram\Circuit_C.txt  (logic equations compatible with WolframAlpha engine)

<drive>:\CSD\P1\Algebra\circuit_C.jpg, circuit_C.pdf, etc. (pictures, scanned sheets of paper, ...) 

<drive>:\CSD\P1\VHDL\Circuit_C.vhd, Circuit_C_tb.vhd  (the VHDL files for running the EDA tools)

Furthermore, something very important: do not start a project or a simulation from scratch but copying and adapting a similar exercise or file from this web. Our web contains many examples and exercises that can be used as templates to copy and adapt.


Section B on design plans (visio) for inventing circuits. Once you have the truth table, you can invent/create/infer and test/check/verify several circuits from the specifications.

Fig. 3. Design methods.

And the fundamental flow for designing circuits once the initial specifications are set.

Fig. 4. Main steps of the design process.

3. Development (Let's follow the plan to obtain results)

Developing means doing it, executing a given plan to achieve a solution.  

Analysis:   The way to proceed and the necessary CAD/EDA tools will depend on the path you follow. For example:

Method I.- Circuit simulator: Draw/capture  the circuit schematic in Proteus and run a simulation. Try all the possible input combinations to complete the truth table. Use files to copy and adapt from Lab 1.1.

Method II.- Numerical engine WolframAlpha: Write the circuit equation in a text file. Copy and paste them in WolframAlpha and run the engine to obtain the circuit's truth table.

             circuit and equation 

Fig. 3. Circuit and equation.

Method III.- Analytical method using Boole's Algebra. Pen and paper and discussion in class or in cooperative groups.

 Notes on handwritten analysis of Circuit_C and rec.

 

Method IV.- VHDL project: Write a VHDL file consisting of entity and architecture based on algebraic equations. Start a VHDL synthesis project using an EDA tool and a VHDL simulation project using a testbench to obtain the circuit's truth table.


Design: The way to invent several circuits derived form the same initial truth table will require different tools and techniques. Thus apply them conveniently to obtain results: canonical equations (sum of minterms or product of maxterms) which are the exact representation of the truth tables, minilog (or logic friday) application to obtain minimised equations (SoP, PoS), only-NOR transformation, only-NAND transformation, etc.

- Circuit C truth table using maxterms (Circuits 1) and minterms (Circuits 2) rec.

- Circuit_C truth table using SoP (Circuits 3) and PoS (Circuits 4)  rec.

 

4. Testing (Let's see if the results are correct)

Testing means to check or verify that the solution is correct and agrees with the initial specifications.

Analysis: The best way to check the truth table is by comparison with the truth table obtained by other methods. 


Design: If you have developed a circuit, such as Circuit_3 based on SoP from the initial truth table, a valid way  to test it is by using any analysis method to deduce its truth table.

 

5. Report

Project report: sheets of paper, scanned figures, file listings, notes or any other resources.

 

6. Prototyping

Use training boards and perform laboratory measurements to verify how the circuit works. We'll explain this final design step in P3.

 

Other materials of interest

- You can read books on the subject or browse the Internet searching the basic theory on digital electronics. For instance, here there is a series of 14 introductory videos to our subject (Dunn, K., Bluegrass Community and Technical College). Some of the videos also include "pdf" notes and exercises and additional web references.

- Another set of online tutorials on electronics. You can use them to clarify concepts or go for a deeper comprehension of many topics covered in CSD (and in other subjects as well).