UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

P11

P12: microcontroller TMR peripherals

Low Power


Resources in lectures and labs: L12, Lab11


Example_project: 6-bit Johnson sequencer with TMR0 or TMR2

1. Specifications

Phase #3: Enhance project Johnson_sequencer_mod12_LCD phase #2 using TMR0 peripheral to replace external CLK functionality.

  • Let us running the sequencer by means of interrupts from internal timer peripheral TMR0.

  •  The sequencer has to advance at a rate of 10 counts per second, thus the timer will generate an interrupt every 100 ms. This means that SQ_out has a period of 1.2 s (frequency of 8.33 Hz).

  • Add TMR_wave output to show on the oscilloscope the waveform generated by TMR0 toggling logic value every TMR interrupt (var_CLK_flag signal).

Sequencer LCD

Fig 1. Project symbol and I/O signals (Visio).

  • As a final improvement, change TMR0 by TMR2 to compare solutions and discuss performance.


Other similar projects:

In order to study how TMR replaces functionality supplied by other circuits, let us invent a basic timer that like other examples is organised in phases: 

Phase #1: Fixed-time Timer (18.5 s) using exernal CLK (50 Hz, 20 ms time-base).

NOTE: Be aware that a timer circuit is a dedicated processor application conceived in P8  with this specific architecture: datapath + FSM + CLK_Generator.

Phase #2:  Fixed-time Timer_LCD  that uses a library of LCD functions to print ASCII messages.

Phase #3: Fixed-time Timer_LCD_TMR0 using internal TMR0 1 μs time-base to replace external time-base.   

Phase #4: Fixed-time Timer_LCD_TMR2 using internal TMR2 1 μs time-base to replace TMR0 in this way.

 

2. Planning

Hardware circuit updated is represented in Fig. 2.

Circuit

Fig 2. Circuit sketch.

 

Software. We pretend to generate var_CLK_flag using internal TMR0. Therefore, the project has the same conception and only minor changes are necessary. In set_CLK_source state TMR0 will be selected and set as the source for sequence timing. In stop_CLK TMR will be switch off. 

 

Fig. 3 shows how the hardware-software diagram is modified.

hardware-software

Fig 3. Software-hardware diagram when using TMR0.

 

 In this application TMR0 must be a timer derived from the internal FOSC/4 system time-base. Thus, T0CS = 0.

TMR0 configuration

Fig 4. Functional structure and configuration bits in TMR0.

To obtain a var_CLK_flag signal every TP = 100 ms, a convenient set of parametres may be: N1 = 32, N2 = 125,  N3 = 25 (char variable). It means a hardware interrupt TMR0IF every 4 ms.

ISR

Fig 5. Algorithm in ISR() to generate var_TMR0_flag from TMR0 interrupts.

Project locations for Phase #3 are:

L:\CSD\P12\TMR0\Johnson_sequencer_mod12_LCD_TMR

 

L:\CSD\P12\TMR2\Johnson_sequencer_mod12_LCD_TMR

3. Development

Circuit captured in Proteus is Johnson_sequencer_mod12_LCD_TMR.pdsprj. Source file  Johnson_sequencer_mod12_LCD_TMR.c and LCD libraries must be compiled in the same MPLABX project for the target PIC18F4520 microcontroller.

capture

Fig. 5. Circuit captured in Proteus. External CLK is deleted and the functionality replaced by TMR0.

 

4. Testing 

 

waves

Fig. 6. Circuit running and watching variables and oscilloscope waveforms.

Measure the period of the output TMR_wave.

Why using the calculated values the time elapsed between TMR0 interrupts is 104.52 us instead of 100 ms ?

What is the meaning of software overhead? How to solve it? Try to replace TMR0 by TMR2 and repead measurements.

5. Report

 

6. Prototyping

Download the application to a training board an verify that it works as expected and the same as in the simulator.

Other similar projects on sequential circuits

The same example Timer XLCD using extended libraries for the LCD. Find what eXtended libraries are required for commanding the TMR0 replacing low-level code in  previous examples.

Examples for other μC:

- Here is the same example that you saw in P11 for the Atmel ATmega 8535. A swith Timer0_ON_OFF  allows selecting the time-base for the datapath: external CLK or TMR0.

- This is the P8 programmable timer HHMM complete project solved using a µC ATmega8535.

- This is the timer project targetiing PIC16F877A microcontroller.

 

Other materials of interest

At this end point of the course, this list of projects will show you possibilities of this subject to design many electronic appliances. For example, this is another tutorial on the design of a bicycle speed meter (20" tyre) using TMR2 as time-base for gate-time counting period and TMR3 for counting external pulses from the magnetic sensor attached to the byke wheel.

In this introductory project, the TMR0  as been interfaced at bit level programming configuration bits in RAM registers. However, as in many other peripherals, all commercial C compilers contain high-level C libraries (drivers) that can be used instead of programming at bit level. These libraries (example from ST)  become a hardware  abstraction layer (HAL) to allow the programmer to control peripherals without having to know specific details of a microcontroller family or vendor. Remember how LCD was programmed in P11, without much attention on Hitachi HD44780 chip or liquid crystal technology because al this highly specific hardware was abstracted. We recommend you to study some of them because as projects grow they become indispensable.  


This is a list of very interesting teaching experiments and projects based on platform Digital Systems Development Board (DSDB) also compatible with ELVIS III from National Instruments. A typical FPGA board populated with a Xilinx device. It can be programmed with VIVADO EDA tools.


This is an example of a reseach paper in the area of microcontrollers and peripherals on the topic of low power consumption, leaded by prof. Ferran Reverter of the dept. of Electronic Engineering

Reverter, F., "Toward Non-CPU Activity in Low-Power MCU-Based Measurement Systems", IEEE Transactions on Instrumentation and Measurement ( Volume: 69 , Issue: 1 , Jan. 2020 ). DOI: 10.1109/TIM.2019.2953374.

Abstract: This article evaluates the benefits of having peripheral-triggered peripherals in a microcontroller unit (MCU) intended for low-power sensor applications. In such an architecture, the functionality is moved from the central processing unit (CPU) to the peripherals so that a peripheral is able to trigger another peripheral with non-CPU intervention. For the sensor data logging application under study, both energy consumption and measuring time are reduced by a factor of 2 with respect to the case of applying an interrupt-based approach that requires the CPU intervention.

Download the full paper logging in UPC intranet.


Those below are a pair of bachelor thesis (TFG) on the subject:

- Alberto Gómez Blázquez, A., "Autonomous low-power wireless sensor for a remote weather monitoring station", 2016, (1) (2).  

Wheater station

Fig 5. Weather station representation and its final prototype.

- García Moreno, A. "Autonomous low-power wireless sensor for greenhouse irrigation, 2016, (1)


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