SPICE-based simulation
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Proteus from Labcenter Electronics (commercial) is a virtual laboratory and SPICE-based simulation of electronic circuits. Analogue electronics, digital circuits and microcontrollers simulation, all in one. |
Available at the EETAC. |
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Multisim from National Instruments (commercial) is the schematic capture and simulation program designed for schematic entry, simulation, and feeding to downstage steps, such as PCB layout. |
Available at the UPC. Instructions on how to setup the software. |
Numerical engines
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WolframAlpha. A powerful computing tool available from Wolfram Research. |
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HADES Java applets, a framework for interactive simulation from Univertity of Hamburg. Here it is more information on how to use and install it. |
Minimisation of logic functions
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(© W.M.J. de Valk). Minimisation program (source Wikipedia EXPRESSO). |
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Logic Friday. Logic Friday takes the help of Espresso logic design minimiser to efficiently reduce the functions in your electronic design. Instead of using the traditional Karnaugh map method of min term reduction, the program manipulates the function iteratively to give a closely approximated result, eliminating redundancy. (ref.) |
Lattice EDA tools for CPLD and FPGA
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Lattice Semiconductor Diamond. |
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Lattice Semiconductor ispLEVER Classic. |
Xilinx EDA tools for CPLD and FPGA
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ISE. Download and use the version 14.7 (2013). (ref). ISim is the integrated VHDL simulator that will be used to check our designs. The Adept application is for downloading the configuration bit file to the board. The latest version for windows is v2.19.2.
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Vivado is the new EDA tool from Xilinx to cover newer FPGA |
Intel EDA tools for CPLD and FPGA
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Intel Quartus Prime. Download and use version 19.1 (2020). ModelSim Intel Starter Edition is the integrated VHDL simulator that will be used to check our designs. |
Microcontroller programming environment
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MPLABX Integrated Development Environment (IDE) | XC8 C compiler. |