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Bachelor's Degree in Telecommunications Systems and in Network Engineering |
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P4 objectives |
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After studying the content of these projects, you will be able to:
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Use standard arithmetic blocks for integer numbers based on the two’s complement (2C) convention: subtractors, adders, comparators, multipliers, etc.
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Solve arithmetic operations for integers in two’s complement format (2C).
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Explain the range of an N-bit integer number in 2C and the meaning of an overflow operation result.
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Design combinational circuits in a hierarchical way using multiple combinational circuits as components (plan C2).
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Explain why a XOR gate can be considered a programmable gate that can be both an inverter or a buffer.
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Perform VHDL gate-level simulations to calculate propagation delays and the maximum speed of computation of a given circuit.
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Discuss the main features of the electronic technology behind a CPLD or FPGA.
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Implement circuits in target PLD chips (CPLD or FPGA) populating the laboratory training boards from Xilinx, Intel-Altera or Lattice Semiconductor.
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Design circuits that can operate on different types of data, for instance, natural and integer numbers.
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| Web activa des de 09/2001, @ F. J. Robert, J. Jordana. Web editat amb Microsoft Expression Web 4. El contingut és un complement als materials d'estudi del curs Circuits i Sistemes Digitals disponibles al campus digital Atenea. Llicència:Reconeixement 4.0 Internacional de Creative Commons |