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Analysis of Circuit_P based on logic gates |
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Circuit_P Method I | Method II | Method III | Method IV |
1. Specifications | Planning | Developing | Testing | Report |
Deduce the truth table of Circuit_P in Fig. 1 using analysis method I and compare and discuss solutions solving the projet using other analysis methods.
Fig. 1. Circuit_P based on logic gates. |
Analysis projects consist of four sections as shown in Fig. 2.
Fig. 2. Organise your analysis project following this sequence.Write your report only when your result is verified using another analysis method. |
Fig. 3 shows the general concept map including up to four methods for analysing simple combinational circuits.
Fig. 3. Proposed analysis methods (Visio). The concept map combining analysis and design (Visio). |
Note this important idea: in CSD you never have to start a project or a simulation from scratch but copying and adapting a similar exercise or file from this web. For instance Circuit_W from lecture L1.3 or from the highlighted project Circuit_C. Our web contains many examples and exercises that can be used as templates to copy and adapt.
Specifications | 2. Planning | Developing | Testing | Report |
We can plan solving two independent projects and compare results. For instance, Fig. 4 shows the concepts and steps involved in method I and method III for analysing the given circuit.
Fig. 4. Both methods have to agree in the same truth table. |
Analytical method using Boolean algebra and pen & paper. If the circuit is too large or you are still learning basic Boole's algebra, it is better completing the analysis of only a section of the circuit.
Place the projects in different folders and name them accordingly. Normally we use our C: hard disk drive, for instance:
C:\CSD\P1\Circuit_P\algebra\Circuit_P.jpg, circuit_K.pdf, etc. (pictures, scanned sheets of paper, ...)
Find the circuit equation.
Simplify equations until SoP or PoS equations are obtained.
In order to fill in the truth table, add missing variables to convert SoP into sum of minterms or PoS into product of maxterms.
Specifications | Planning | 3. Developing | Testing | Report |
Apply Boolean algebra to deduce the truth table and minterms or maxterms. Circuit_P notes.
The truth table as a product of maxterms:
Specifications | Planning | Developing | 4. Testing | Report |
Testing means to check or verify that the solution is correct and agrees with the initial specifications.
In this analysis section, the simplest way to check the truth table is by comparison with the truth table obtained by other methods.
Specifications | Planning | Developing | Testing | 5. Report |
Project report: sheets of paper, scanned and annotated figures, file listings, notes or any other resources. In CSD follow this rubric of indications for writing reports.
Method I | Circuit_P method II | Method III | Method IV |
1. Specifications | Planning | Developing | Testing | Report |
Deduce the truth table of Circuit_P in Fig. 1 using analysis method II and compare and discuss solutions.
Fig. 1. Circuit_P based on logic gates. |
Specifications | 2. Planning | Developing | Testing | Report |
Planning means organising and discussing how to proceed to reach solutions. A flow chart of sequential operations will be necessary to explain what to do, how to do it and when.
- Choose Proteus as circuit simulator: draw/capture the circuit schematic in Proteus and run a simulation.
- In CSD we never start a project or a simulation from scratch, but we copy and adapt from similar exercises found here in this digsys web. For example, use files to copy and adapt from Lab 1.1.
- Select a library of a classic technology, for instance LS-TTL or CMOS series 4000.
- Try all the possible input combinations to fill in and complete the truth table.
Project location:
C:\CSD\P1\Circuit_P\Proteus\Circuit_P.pdsprj (the circuit captured in Proteus to be simulated)
Specifications | Planning | 3. Developing | Testing | Report |
Developing means executing a given plan to achieve a circuit solution. Circuit simulator: Draw/capture the circuit schematic in Proteus and run a simulation considering all input binary combinations to fill in the truth table. Circuit_P.pdsprj.
Specifications | Planning | Developing | 4. Testing | Report |
Testing means to check or verify that the solution is correct and agrees with the initial specifications.
In this analysis section, the simplest way to check the truth table is by comparison with the truth table obtained by other methods.
Specifications | Planning | Developing | Testing | 5. Report |
Project report: sheets of paper, scanned and annotated figures, file listings, notes or any other resources. In CSD follow this rubric of indications for writing reports.
Method I | Method II | Circuit_P Method III | Method IV |
1. Specifications | Planning | Developing | Testing | Report |
Deduce the truth table of Circuit_P in Fig. 1 using analysis method III and compare and discuss solutions.
Fig. 1. Circuit_P based on logic gates. |
Specifications | 2. Planning | Developing | Testing | Report |
VHDL synthesis and simulation project.
- Translate to VHDL Circuit_P algebraic equation in Fig. 1 using a similar file to copy and adapt. It is the same equation for methods I, III and IV.
- Choose a target chip, for instance CPLD MAX II EPM2210F324C3, and start a VHDL synthesis project using an EDA tool, for instance Quartus Prime.
- Examine and print the RTL and technology schematics.
- Start a VHDL simulation project, for instance in ModelSim-Intel FPGA Starter Edition, using a testbench to input signal stimulus for all 16 combinations.
Project location:
C:\CSD\P1\Circuit_P\VHDL\(files)
Specifications | Planning | 3. Developing | Testing | Report |
This is the Circuit_P.vhd equation as the VHDL source file for this project.
Fig. 2. Project folder and names. |
Inspect RTL and technology views.
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Fig. 3. RTL and technology views (target chip Cyclone IV FPGA EP4CE115F29C7). |
Once examined the RTL and technology views, continue starting a VHDL simulation project using a testbench to obtain the circuit's truth table. Fig. 4 shows the testbench fixture to be written in VHDL.
Fig. 4. VHDL testbench fixture for measuring how the circuit works using a timing diagram when applying several input stimulus. |
Use, for instance, the testbench process available in this example file: Circuit_P_tb.vhd and a VHDL simulation tool (Actively, ModelSim ISim, etc.) to write down the truth table (in this file pay attention only to the stimulus process activity and the constant Min_Pulse).
Fig. 5. Waveform results to obtain the truth table. |
Specifications | Planning | Developing | 4. Testing | Report |
Testing means to check or verify that the solution is correct and agrees with the initial specifications.
In this analysis section, the simplest way to check the truth table is by comparison with the truth table obtained by other methods.
Specifications | Planning | Developing | Testing | 5. Report |
Project report: sheets of paper, scanned and annotated figures, file listings, notes or any other resources. In CSD follow this rubric of indications for writing reports.
Method I | Method II | Method III | Circuit_P method IV |
1. Specifications | Planning | Developing | Testing | Report |
Deduce the truth table of Circuit_P in Fig. 1 using analysis method IV and compare and discuss solutions.
Fig. 1. Circuit_P based on logic gates. |
Specifications | 2. Planning | Developing | Testing | Report |
Numerical engine WolframAlpha to be used for inferring the truth table from the circuit's algebraic equation.
Fig. 2. Planning the method IV as a bullet list of operations. |
- Write the circuit equation in Fig. 3 in a text file step-by-step.
- Use files to copy and adapt them from Lab 1.1. or WolframAlpha.
- Reorder input variables if such is the case before annotating maxterms and minterms.
- Draw the truth table.
- Project location:
C:\CSD\P1\Circuit_P\Wolfram\Circuit_P.txt (logic equations compatible with WolframAlpha engine)
Specifications | Planning | 3. Developing | Testing | Report |
Deducing the circuit's equation analysing the circuit.
Fig. 3. The circuit and its equation are the initial concept from which to start the analysis. |
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Write the circuit equation in a text file step by step, for instance, Circuit_P_equation.txt. Copy and paste it in WolframAlpha and run the engine to obtain the circuit's truth table. pay attention to the variable order before annotating minterns or maxterms.
Fig. 4. Results from WolframAlpha. |
Reorder input variables and deduce the truth table as:
Fig. 5. Circuit_P truth table in product of maxterns and sum of minterms forms. |
Specifications | Planning | Developing | 4. Testing | Report |
Testing means to check or verify that the solution is correct and agrees with the initial specifications.
In this analysis section, the simplest way to check the truth table is by comparison with the truth table obtained by other methods.
Specifications | Planning | Developing | Testing | 5. Report |
Project report: sheets of paper, scanned and annotated figures, file listings, notes or any other resources. In CSD follow this rubric of indications for writing reports. Remember that a plain printed sheet from any computer tool is not marked in CSD unless handwritten comments discussing results are embedded in the pictures themselves.