UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

AR1

 

AR2: Midterm exam and PLA review and orientation

Combinational circuits, methods, plans, VHDL, projects, applications

L6.2

[8/11]

 

School days (activity restricted)

Some ideas and adaptations after surveys, exams and questionnaires, let us see if we can readdress the situation and complete our objectives:
-    Classes are rescheduled after these exam weeks due to weather complications.
-    Today we will sit for a second chance Q1_4 (optional, the better mark prevails).
-    PLA4_2 report by November 14 is modified to include the solution of the Exam1 Problem1 (and it is also a good time for you for finding solutions for the other exam problems or other doubts on Chapter 1).
-    PLA6 is suppressed; the new PLA6_7 will include content from P5, P6 and P7 materials and labs.
-    PLA9 assignment will be the same circuit that you already designed in PLA2.
-    PLA10 is suppressed; the new PLA10_11 will include content from P10 and P11 materials and labs. This PLA10_11 is the same product that you will design in PLA6_7.

-    Please, consider the way you are solving the PLA, LAB, highlighted projects and class questions, you have to use these projects to study in detail the subject content, for instance to pass exams and thus pass the course.
-    Consider the way you are imagining solutions: include always flowcharts and schematics.  Here everything is discussed on paper schematics. The better you draw schematics, the better you learn and we can help you when asking questions.
-    Consider the way you work or cooperate in group. Your preference is working in teams rather than individually, but be aware that working efficiently in group is very demanding and much more difficult to learn and put into practice.
-    And finally, participate in class and ask questions: the more active you are the better.

Questionnaire Q1_4 on chapter 1 materials and projects: P1 - P2 - P3 -P4  (second chance)

(Next semester: PLA1 ---> PLA1_1+PLA1_2; PLA2_3 ---> PLA2+PLA3, and PLA4 ---> PLA4_1+PLA4_2)