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Chapter 2 problems |
- A2.6 - |
Analysis of an asynchronous circuit (Circuit_B) |
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1. Specifications
Fig. 1 represents the datasheet schematic of the chip 74LS290 containing several chained flip-flops and logic gates. Let us adapt it as usual to our naming style and conventions.
We can use our set of tools to analyse Circuit_B represented in Fig. 2 built using this chip resources and external logic gates.
Fig. 1. 74LS290 chip equivalent internal circuit. |
Read its datasheet to determine how does it work (what is the funcion of each pin). Some J and K inputs are not driven, we will assume that they are connected to '1'.
Analyse Circuit_B in Fig. 2 using method II: Proteus capture and simulation, or method III: VHDL synthesis and test. Determine how does the circuit work, meaning finding the vector output P(4..1) in a clocked (CLK) timing diagram.
What is the maximum CLK frequency when picking the PLD target chip indicated below?
- Cyclone IV
- MAXII
Test your solutions using method I: handwritten analysis.
Fig. 2. Circuit_B to be analysed using our three methods. |