upc eetac_1 Bachelor's Degree in Telecommunications Systems and in Network Engineering

Week 8

Week 9: Generation of CLK signals from external (quartz crystal oscillators) and dedicated processors (datapath & control unit)

Week 10


Guided activities #9

[P8] Dedicated processors (datapath + control unit + CLK generators)

CLK generator design. Frequency dividers.


Discussion of an advanced project: Designing the digital timer proposed in P8. The proposed architecture when the project is large and complex: the dedicated processor composed of:

- Datapath (registers and aritmetic and logic circuits)

- Control unit (FSM)

- CLK geenrator

- The CLK_Generator:  frequency dividers and the T_FF as a circuit to square pulsed signals.

- Oscillators. RC, quartz crystal, 555 chip, etc.  This is unit on CLK circuits based on gates or specific integrated circuits.


Week 8

Week 9: Chapter III: Introduction to microcontrollers

Week 10


Laboratory #9

[P9] Microcontrollers. A brief description of the architecture. 

Example on running the project's design flow: Dual_MUX4, digital I/O.


Chapter III. This course we'll use the 8-bit microcontroller chip PIC18F4520 from Microchip, MPLAB X integrated development environment (IDE) and Proteus VSM as the simulation tool.

The architecture of the PIC18F family (or another micrcontroller like the PIC16F877A or the ATmega8535).

Basic concepts on microcontrollers at this unit.

Your first tutorial using microcontrollers: the Dual_MUX4. Specifications of this combinational circuit and the project design flow from conception to the final circuit. This application is for running the integrated development environment (IDE) MPLAB-X + XC8.

Basics ideas on programming and debugging. C  source file, target chip, integrated development environment (IDE), compilation, output files ELF or COF and HEX, simulation in Proteus, step by step debugging, breakpoints, watch variables, etc.

- Measurements: loop time, interrupt time, etc. How long does it take to execute an instruction in C or in assembly? Dissasemply mode.



Lecture #9

[P9] Another example: designing a 1-digit BCD adder

Debugging tools: break points, step by step mode, watch windows, etc.


A bit of theory. Harvard versus Von Neumann architectures, 8-bit, 16-bit, etc. families, assembler instructions, RAM memory, EPROM Flash) program memory, I/O ports, etc.

Our modular CSD style of programming: the hardware-software diagram to explain the project architecture. RAM variables.

Analysis of the Dual_MUX4 example: organising the C code in our CSD style:

- Hardware. (microcontroller, oscillator, reset and I/O pins).

- Software. Microcontroller initialisation and infinite loop.

- init_system(). Configuration registers. How to configure a port pin as input or as output.  The idea of tri-state gates and bidirectional wires and buses. How to set the direccion (TRISn) of a pin as input or as output?

- read_inputs(). Read/poll/capture inputs. How to convert electrical signals, voltages and currents into RAM variables? Bitwise logic operations.

- write_outputs(). Write outputs. Bitwise logic operations.

- truth_table(). How to solve the project's algorithm? Translate the truth table to C using a behavioural interpretation (plan B) and flowcharts.