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Bachelor's Degree in Telecommunications Systems and in Network Engineering |
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Chapter 1 problems |
- D1.2 - |
BCD_7seg_decoder chip |
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1. Specifications
Design a BCD_7seg_decoder chip using plan A and PoS equation.
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Fig.1. When operating, this decoder only deals with inputs from 0 to 9 ("0000" to "1001"). The remaining 6 combinations are of no interest. |
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Fig.2. Truth table definition as an incomplete circuit. |
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